Physical Design Engineer

Job Description	Responsible for independent planning and execution of Place and Route for various designsin 20nm technology nodes and below. o Strong understanding of complete flow from RTL-to-GDSII. o Hands on experience in all stages of the design such as Floorplanning, Placement,CTS, Routing, Crosstalk avoidance, Physical Verification etc. o Good knowledge on timing closure methodologies such as STA. Strong debug capabilities with parasitic extraction, LVS/DRC and other Physical verification checks. o Should be able to resolve all PNR issues independently. Job Requirements: Masters/Bachelors Degree in Electrical/Electronics engineering with 3+ years of experience in Physical Design. Work independently and with cross functional teams in the areas of RTL to GDSII implementation. Understanding of industry EDA tools used in the implementation of VLSI designs Strong problem solving skills
Desired Profile	Location: Xilinx India, Hyderabad Call: +91-9502750225 Mail: ravikir@xilinx.com
Experience	4 - 8 Years
Industry Type	Semiconductors / Electronics
Role	Technical Architect
Functional Area	IT Software - Embedded, EDA, VLSI, ASIC, Chip Design
Education	UG - B.Tech/B.E. - Electronics/Telecommunication PG - M.Tech - Electronics/Telecommunication DOCTORATE - Doctorate Not Required
Location	Hyderabad / Secunderabad
Keywords	CAD, ASIC, SoC, ICC, Physical design
Contact	Mr. Ravi Kiran Balla Xilinx India Technology Services Pvt Ltd
Telephone	+91-040-67214000
Website	http://www.xilinx.com