Staff II -physical Design Engineer(28nm)

Job Description

Candidate will be required handle end-to-end Physical Design responsibility for modules of large, high speed multi-core ICs at 28nm & below technologies including floor planning, clock-grid design, power distribution, block implementation and top-level integration. Must possess good scripting abilities in Perl and Tcl, and hands-on experience on any of the industry standard place and route tools like Atoptech or Magma. Must demonstrate strong analytical capabilities and ability to work with a broader team.

Physical Design Engineer

Job Description

Responsible for independent planning and execution of Place and Route for various designsin 20nm technology nodes and below. o Strong understanding of complete flow from RTL-to-GDSII. o Hands on experience in all stages of the design such as Floorplanning, Placement,CTS, Routing, Crosstalk avoidance, Physical Verification etc. o Good knowledge on timing closure methodologies such as STA. Strong debug capabilities with parasitic extraction, LVS/DRC and other Physical verification checks. o Should be able to resolve all PNR issues independently. Job Requirements: Masters/Bachelors Degree in Electrical/Electronics engineering with 3+ years of experience in Physical Design. Work independently and with cross functional teams in the areas of RTL to GDSII implementation. Understanding of industry EDA tools used in the implementation of VLSI designs Strong problem solving skills